1. Field of the Invention
The present invention relates to an apparatus and a method for processing high speed data using hybrid Direct Memory Access (DMA). More particularly, the present invention relates to an interface between a host processor and a peripheral Input/Output (I/O) unit for processing high speed data.
2. Description of the Related Art
DMA denotes a technique allowing a peripheral I/O unit to directly access a memory via a DMA controller without a host processor. DMA allows the peripheral I/O unit to operate even while the host processor performs an operation of a different process. Thus, DMA enhances data throughput and Central Processing Unit (CPU) use performance.
In a conventional art, as a method for accessing an I/O bus in order to transmit I/O data to a memory, only one of a DMA method, a non-DMA method, and a polling driving method or an interrupt driving method in case of the non-DMA method has been used. In the polling driving method and the interrupt driving method, a CPU provides a service to a peripheral I/O unit. In the interrupt driving method, a CPU provides a service only when a peripheral I/O unit requests the service. Therefore, the interrupt driving method is advantageous in the case where an amount of data to be transferred at one time via an I/O bus is large. On the other hand, in the polling driving method, a CPU monitors whether a peripheral I/O unit requires a service or whether the peripheral I/O unit is ready to receive a service using a predefined time interval. Therefore, the polling driving method is advantageous in the case where an amount of data to be transferred at one time via an I/O bus is small. That is, the polling driving method may provide better throughput in an aspect of data processing than the interrupt driving method, but has a poor tradeoff in the aspect of a bus occupancy rate.
A CPU sharing performance may be controlled depending on a selection of an I/O bus access method. When only one of the above methods for accessing an I/O bus is used, deterioration in a CPU use performance may result. For example, in the case where only the interrupt driving method is implemented, the interrupt driving method is also used in order to transfer small-sized data. In this case, since an additional overhead for interrupt processing is required despite small data, performance deterioration may result. On the other hand, in the case where only the polling driving method is implemented, during transmission of data having a size larger than a predefined size, other processors cannot share a resource because the resource is busy, and performance deterioration may result. Such limitations may be disadvantageous in an application where transmission of small-sized signaling data frequently occurs and high speed data transmission and excellent CPU use performance are required.
Therefore, a need exists for an apparatus and method for processing high speed data and improving a CPU use performance.